MC9S12E128CFU Freescale Semiconductor, MC9S12E128CFU Datasheet - Page 145

IC MCU 128K FLASH 25MHZ 80-QFP

MC9S12E128CFU

Manufacturer Part Number
MC9S12E128CFU
Description
IC MCU 128K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CFU

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
16 bit
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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3.3.4
Port Q is associated with the Pulse Width Modulator (PMF) modules. Each pin is assigned according to
the following priority: PMF > general-purpose I/O.
When a current status or fault function is enabled, the corresponding pin becomes an input. PQ[3:0] are
connected to FAULT[3:0] inputs and PQ[6:4] are connected to IS[2:0] inputs of the PMF module. Refer
to the PMF block description chapter for information on enabling and disabling these PMF functions.
During reset, port Q pins are configured as high-impedance inputs.
3.3.4.1
Read: Anytime. Write: Anytime.
If the associated data direction bit (DDRQx) is set to 1 (output), a read returns the value of the I/O register
bit. If the associated data direction bit (DDRQx) is set to 0 (input), a read returns the value of the pin.
3.3.4.2
Read: Anytime. Write: Never, writes to this register have no effect.
This register always reads back the status of the associated pins.
Freescale Semiconductor
Reset
Reset
PMF:
W
W
R
R
Port Q
Port Q I/O Register (PTQ)
Port Q Input Register (PTIQ)
0
0
0
0
7
7
= Reserved or Unimplemented
= Reserved or Unimplemented
PTIQ6
PTQ5
IS2
0
u
6
6
Figure 3-24. Port Q Input Register (PTIQ)
Figure 3-23. Port Q I/O Register (PTQ)
PTIQ5
PTQ5
MC9S12E128 Data Sheet, Rev. 1.07
IS1
0
u
5
5
PTIQ4
PTQ4
IS0
0
u
4
4
u = Unaffected by reset
FAULT3
PTIQ3
PTQ3
0
u
3
3
Chapter 3 Port Integration Module (PIM9E128V1)
FAULT2
PTIQ2
PTQ2
0
u
2
2
FAULT1
PTIQ1
PTQ1
0
u
1
1
FAULT0
PTIQ0
PTQ0
0
u
0
0
145

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