MC9S12E128CFU Freescale Semiconductor, MC9S12E128CFU Datasheet - Page 162

• Manufacturer Part Number: MC9S12E128CFU
• Description: IC MCU 128K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E128CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 3 Port Integration Module (PIM9E128V1)
3.5
The reset values of all registers are given in the register description in
Register
All ports start up as general-purpose inputs on reset.
3.5.1
All registers including the data registers get set/reset asynchronously.
properties after reset initialization.
162
P
Definition”.
Resets
Reset Initialization
BKGD pin
M[3,1:0]
M[7:4]
Port
AD
Q
A
B
E
K
P
S
U
T
Input/Output
section Bus
Control and
Direction
Refer to
Data
Input
Input
Input
Input
Input
Input
Input
Input
Table 3-37. Port Reset State Summary
MC9S12E128 Data Sheet, Rev. 1.07
Pull Mode
Pull Up
Pull Up
Pull Up
Hi-z
Hi-z
Hi-z
Hi-z
Hi-z
Hi-z
Reset States
Refer to section Bus Control and Input/Output
Red. Drive
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Table 3-37
Section 3.3, “Memory Map and
Wired-OR
Disabled
Disabled
Disabled
Mode
N/A
N/A
N/A
N/A
N/A
summarizes the port
Freescale Semiconductor
Interrupt
Disabled
N/A
N/A
N/A
N/A
N/A
N/A
N/A