MC9S12E128CFU Freescale Semiconductor, MC9S12E128CFU Datasheet - Page 187

• Manufacturer Part Number: MC9S12E128CFU
• Description: IC MCU 128K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E128CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

4.4.6
The RTI can be used to generate a hardware interrupt at a fixed periodic rate. If enabled (by setting
RTIE=1), this interrupt will occur at the rate selected by the RTICTL register. The RTI runs with a gated
OSCCLK (see
RTIF flag is set to 1 and a new RTI time-out period starts immediately.
A write to the RTICTL register restarts the RTI time-out period.
If the PRE bit is set, the RTI will continue to run in pseudo-stop mode.
4.4.7
4.4.7.1
The CRGV4 block behaves as described within this specification in all normal modes.
4.4.7.2
The VCO has a minimum operating frequency, f
to a failure or due to long crystal start-up time, the bus clock and the core clock are derived from the VCO
Freescale Semiconductor
Real-Time Interrupt (RTI)
Modes of Operation
Normal Mode
Self-Clock Mode
Section Figure 4-22., “Clock Chain for
gating condition
OSCCLK
= Clock Gate
STOP(PSTP,PRE),
WAIT(RTIWAI),
RTI enable
Figure 4-22. Clock Chain for RTI
MC9S12E128 Data Sheet, Rev. 1.07
2
2
2
2
2
2
SCM
1024
.
. If the external clock frequency is not available due
RTR[6:4]
0:1:0
0:0:1
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0:0:0
RTI”). At the end of the RTI time-out period the
COUNTER (RTR[3:0])
4-BIT MODULUS
Chapter 4 Clocks and Reset Generator (CRGV4)
RTI TIMEOUT
187