MC9S12E128CFU Freescale Semiconductor, MC9S12E128CFU Datasheet - Page 527

IC MCU 128K FLASH 25MHZ 80-QFP

MC9S12E128CFU

Manufacturer Part Number
MC9S12E128CFU
Description
IC MCU 128K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CFU

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
16 bit
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Freescale Semiconductor
NOACCE
NECLK
LSTRE
PIPOE
RDWE
Field
7
5
4
3
2
CPU No Access Output Enable
Normal: write once
Emulation: write never
Special: write anytime
1 The associated pin (port E, bit 7) is general-purpose I/O.
0 The associated pin (port E, bit 7) is output and indicates whether the cycle is a CPU free cycle.
This bit has no effect in single-chip or special peripheral modes.
Pipe Status Signal Output Enable
Normal: write once
Emulation: write never
Special: write anytime.
0 The associated pins (port E, bits 6:5) are general-purpose I/O.
1 The associated pins (port E, bits 6:5) are outputs and indicate the state of the instruction queue
This bit has no effect in single-chip or special peripheral modes.
No External E Clock
Normal and special: write anytime
Emulation: write never
0 The associated pin (port E, bit 4) is the external E clock pin. External E clock is free-running if ESTR = 0
1 The associated pin (port E, bit 4) is a general-purpose I/O pin.
External E clock is available as an output in all modes.
Low Strobe (LSTRB) Enable
Normal: write once
Emulation: write never
Special: write anytime.
0 The associated pin (port E, bit 3) is a general-purpose I/O pin.
1 The associated pin (port E, bit 3) is configured as the LSTRB bus control output. If BDM tagging is enabled,
This bit has no effect in single-chip, peripheral, or normal expanded narrow modes.
Note: LSTRB is used during external writes. After reset in normal expanded mode, LSTRB is disabled to provide
Read/Write Enable
Normal: write once
Emulation: write never
Special: write anytime
0 The associated pin (port E, bit 2) is a general-purpose I/O pin.
1 The associated pin (port E, bit 2) is configured as the R/W pin
This bit has no effect in single-chip or special peripheral modes.
Note: R/W is used for external writes. After reset in normal expanded mode, R/W is disabled to provide an extra
TAGLO is multiplexed in on the rising edge of ECLK and LSTRB is driven out on the falling edge of ECLK.
an extra I/O pin. If LSTRB is needed, it should be enabled before any external writes. External reads do
not normally need LSTRB because all 16 data bits can be driven even if the system only needs 8 bits of
data.
I/O pin. If R/W is needed it should be enabled before any external writes.
Table 18-6. PEAR Field Descriptions
MC9S12E128 Data Sheet, Rev. 1.07
Description
Chapter 18 Multiplexed External Bus Interface (MEBIV3)
527

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