MC9S12E128CFU Freescale Semiconductor, MC9S12E128CFU Datasheet - Page 574

• Manufacturer Part Number: MC9S12E128CFU
• Description: IC MCU 128K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E128CFU

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Appendix A Electrical Characteristics
A.3
A.3.1
Table A-11
A.3.1.1
The release level V
if the device is powered externally. After releasing the POR reset the oscillator and the clock quality check
are started. If after a time t
clock. The fastest startup time possible is given by n
A.3.1.2
The release level V
if the device is powered externally. After releasing the LVR reset the oscillator and the clock quality check
are started. If after a time t
clock. The fastest startup time possible is given by n
A.3.1.3
Provided an appropriate external reset signal is applied to the MCU, preventing the CPU from executing
code when VDD5 is out of specification limits, the SRAM contents integrity is guaranteed if after the reset
the PORF bit in the CRG Flags Register has not been set.
574
Conditions are shown in
Num
1
2
3
4
5
6
7
8
Startup, Oscillator and PLL
C
D
D
D
D
P
P
T
T
summarizes several startup characteristics explained in this section.
Startup
POR
LVR
SRAM Data Retention
POR release level
POR assert level
Reset input pulse width, minimum input time
Startup from Reset
Interrupt pulse width, IRQ edge-sensitive
mode
Wait recovery startup time
LVR release level
LVR assert level
PORR
LVRR
Table A-4
and the assert level V
and the assert level V
CQOUT
CQOUT
unless otherwise noted
Rating
no valid oscillation is detected, the MCU will start using the internal self
no valid oscillation is detected, the MCU will start using the internal self
Table A-11. Startup Characteristics
MC9S12E128 Data Sheet, Rev. 1.07
LVRA
PORA
are derived from the V
are derived from the V
uposc
uposc
.
.
Symbol
PW
V
V
PW
V
V
n
t
PORR
PORA
WRS
LVRR
LVRA
RST
RSTL
IRQ
Min
0.97
2.25
192
20
2
DD
DD
Supply. They are also valid
Supply. They are also valid
Typ
Freescale Semiconductor
Max
2.07
2.55
196
14
Unit
n
t
t
ns
osc
cyc
V
V
osc
V
V