HD64F2378RVFQ33 Renesas Electronics America, HD64F2378RVFQ33 Datasheet - Page 266

IC H8S MCU FLASH 512K 144-LQFP

HD64F2378RVFQ33

Manufacturer Part Number
HD64F2378RVFQ33
Description
IC H8S MCU FLASH 512K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of HD64F2378RVFQ33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Section 6 Bus Controller (BSC)
6.6.8
When DRAM is accessed, a RAS precharge time must be secured. With this LSI, one T
always inserted when DRAM space is accessed. From one to four T
setting bits TPC1 and TPC0 in DRACCR. Set the optimum number of T
DRAM connected and the operating frequency of this LSI. Figure 6.25 shows the timing when
two T
cycles.
Rev.7.00 Mar. 18, 2009 page 198 of 1136
REJ09B0109-0700
Read
Write
Note: n = 2 to 5
p
states are inserted. The setting of bits TPC1 and TPC0 is also valid for T
Precharge State Control
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
Figure 6.25 Example of Timing with Two-State Precharge Cycle
T
p1
(RAST = 0, CAST = 0)
Row address
T
p2
High
High
T
r
p
states can be selected by
T
c1
Column address
p
cycles according to the
p
states in refresh
T
c2
p
state is

Related parts for HD64F2378RVFQ33