HD64F2378RVFQ33 Renesas Electronics America, HD64F2378RVFQ33 Datasheet - Page 321

IC H8S MCU FLASH 512K 144-LQFP

HD64F2378RVFQ33

Manufacturer Part Number
HD64F2378RVFQ33
Description
IC H8S MCU FLASH 512K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of HD64F2378RVFQ33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Idle Cycle in Case of DRAM Space Access after Normal Space Access: In a DRAM space
access following a normal space access, the settings of bits ICIS2, ICIS1, ICIS0, and IDLC in
BCR are valid. However, in the case of consecutive reads in different areas, for example, if the
second read is a full access to DRAM space, only a T
timing in this case is shown in figure 6.69.
In burst access in RAS down mode, the settings of bits ICIS2, ICIS1, ICIS0, and IDLC are valid
and an idle cycle is inserted. The timing in this case is illustrated in figures 6.70 and 6.71.
Figure 6.69 Example of DRAM Full Access after External Read
Address bus
Data bus
RD
φ
T
1
External read
T
2
(CAST = 0)
T
3
p
T
p
cycle is inserted, and a T
Rev.7.00 Mar. 18, 2009 page 253 of 1136
DRAM space read
T
r
T
Section 6 Bus Controller (BSC)
c1
T
c2
i
REJ09B0109-0700
cycle is not. The

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