SI1000-C-GM Silicon Laboratories Inc, SI1000-C-GM Datasheet - Page 115

• Manufacturer Part Number: SI1000-C-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1000-C-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 20dBm
• Sensitivity: -121dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 85mA
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 20 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4.1 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4352 B
• Supply Current (max): 4.1 mA
• Cpu Family: Si100x
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 25MHz
• Total Internal Ram Size: 4.25KB
• # I/os (max): 22
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 18-chx10-bit
• Instruction Set Architecture: CISC
• Mounting: Surface Mount
• Pin Count: 42
• Package Type: QFN EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1881-5

8.4. CIP-51 Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should not be set to logic l. Future product versions may use these bits to implement new features in which
case the reset value of the bit will be logic 0, selecting the feature's default state. Detailed descriptions of
the remaining SFRs are included in the sections of the data sheet associated with their corresponding sys-
tem function.
SFR Definition 8.1. DPL: Data Pointer Low Byte
SFR Page = All Pages; SFR Address = 0x82
SFR Definition 8.2. DPH: Data Pointer High Byte
SFR Page = All Pages; SFR Address = 0x83
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0
Type
Type
Bit
Bit
DPH[7:0]
DPL[7:0]
Name
Name
7
0
7
0
Data Pointer Low.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indi-
rectly addressed Flash memory or XRAM.
Data Pointer High.
The DPH register is the high byte of the 16-bit DPTR. DPTR is used to access indi-
rectly addressed Flash memory or XRAM.
6
0
6
0
5
0
5
0
Rev. 1.0
4
0
4
0
DPH[7:0]
DPL[7:0]
R/W
R/W
Function
Function
3
0
3
0
Si1000/1/2/3/4/5
2
0
2
0
1
0
1
0
0
0
0
0
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