SI1000-C-GM Silicon Laboratories Inc, SI1000-C-GM Datasheet - Page 57

• Manufacturer Part Number: SI1000-C-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1000-C-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 20dBm
• Sensitivity: -121dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 85mA
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 20 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4.1 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4352 B
• Supply Current (max): 4.1 mA
• Cpu Family: Si100x
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 25MHz
• Total Internal Ram Size: 4.25KB
• # I/os (max): 22
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 18-chx10-bit
• Instruction Set Architecture: CISC
• Mounting: Surface Mount
• Pin Count: 42
• Package Type: QFN EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1881-5

Table 4.4. Reset Electrical Characteristics
V
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
VDD_MCU Monitor
Threshold (V
V
On
VDD Monitor Threshold
(V
Missing Clock Detector
Timeout
Minimum System Clock w/
Missing Clock Detector
Enabled
Reset Time Delay
Minimum RST Low Time to
Generate a System Reset
V
V
Current
DD
DD
DD
DD
POR
= 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.
Ramp Time for Power
Monitor Turn-on Time
Monitor Supply 
)
Parameter
RST
)
Time from last system clock rising edge
System clock frequency which triggers
Recovery from Brownout (V
Delay between release of any reset
Brownout Condition (V
a missing clock detector timeout
(all power modes except Sleep)
Initial Power-On (V
execution at location 0x0000
RST = 0.0 V, VDD = 1.8 V
RST = 0.0 V, VDD = 3.6 V
V
DD
V
V
V
V
source and code
to reset initiation
DD
DD
DD
DD
Ramp from 0–0.9 V
Early Warning
Reset Trigger
I
OL
Conditions
= 2.0 to 3.6 V
= 0.9 to 2.0 V
= 2.0 to 3.6 V
= 0.9 to 2.0 V
= 1.4 mA,
Rev. 1.0
DD
DD
Rising)
DD
Falling)
Rising)
V
0.7 x V
DD
Si1000/1/2/3/4/5
Min
100
1.8
1.7
0.7
15
—
—
—
—
—
—
—
—
—
—
—
—
– 0.6
DD
1.85
1.75
0.75
0.95
Typ
650
300
0.8
—
—
—
—
20
—
10
—
—
4
7
7
0.3 x V
1000
Max
0.6
0.6
1.9
1.8
0.9
30
10
—
—
—
—
—
—
—
—
—
3
DD
Units
kHz
µA
ms
µA
µs
µs
µs
ns
V
V
V
V
V
V
V
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