EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 484

• Manufacturer Part Number: EP1S40B956C5
• Description: IC STRATIX FPGA 40K LE 956-BGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S40B956C5

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 683
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 956-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Principles of SERDES Operation
Figure 5–7. Stratix Programmable Transmitter Clock
5–12
Stratix Device Handbook, Volume 2
Logic Array
Stratix
SDR Transmitter Clock Output
You can route the high-frequency clock internally generated by the PLL
out as a transmitter clock output on any of the differential channels. The
high-frequency clock output allows Stratix devices to support
applications that require a 1-to-1 relationship between the clock and data.
The path of the high-speed clock is shown in
inverter allows you to drive the signal out on either the negative edge of
the clock or 180º out of phase with the streaming data.
Transmitter Circuit
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD0
PD1
Fast
PLL
Register
Parallel
TXLOADEN
× W
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
Register
Serial
Figure
5–8. A programmable
Altera Corporation
TXOUT+
TXOUT−
July 2005