EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 513

• Manufacturer Part Number: EP1S40B956C5
• Description: IC STRATIX FPGA 40K LE 956-BGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S40B956C5

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 683
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 956-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Figure 5–27. Differential High-Speed Timing Diagram & Timing Budget
Altera Corporation
July 2005
Timing Diagram
External
Input Clock
Internal
Clock
Receiver
Input Clock
Timing Budget
External
Clock
Internal
Clock
Synchronization
Transmitter
Output Data
Receiver
Input Data
TCCS
TPPos (min)
Bit n
TPPos (max)
Bit n
TCCS
T
SWBEGIN
RSKM
RSKM
t
SW
Bit n
(min)
Time Unit Interval (TUI)
Clock Placement
High-Speed Differential I/O Interfaces in Stratix Devices
Window (SW)
Sampling
Sampling
Falling Edge
Window
T
SWEND
Internal
TUI
Clock
t
SW
Bit n
(max)
Stratix Device Handbook, Volume 2
RSKM
RSKM
TCCS
TPPos (min)
Bit n + 1
TPPos (max)
Bit n + 1
TCCS
2
5–41