EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 625
EP1S40B956C5
Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S40B956C5
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S40B956C5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 625 of 864
- Download datasheet (11Mb)
Figure 7–26. Convolution Using a 3
Altera Corporation
September 2004
Implementing High Performance DSP Functions in Stratix & Stratix GX Devices
The output pixel value, y(m,n) depends on the surrounding pixel values
in the input image, as well as the filter weights:
To complete the transformation, the kernel slides across the entire image.
For pixels on the edge of the image, the convolution operation does not
have a complete set of input data. To work around this problem, the pixels
on the edge can be left unchanged. In some cases, it is acceptable to have
an output image of reduced size. Alternatively, the matrix effect can be
applied to edge pixels as if they are surrounded on the “empty” side by
y m n
3 Kernel
=
+ w
+ w
w
1
x m 1 n 1
4
7
x m n 1
x m
–
+
1
–
–
n 1
–
+
+
w
w
5
+
Stratix Device Handbook, Volume 2
x m n
2
w
x m 1 n
8
x m
–
+
+
1 n
w
6
x m n
+
w
+
3
w
x m 1 n
9
x m
+
1
–
+
1 n
+
7–47
1
+
1
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