EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 836

IC STRATIX FPGA 40K LE 956-BGA

EP1S40B956C5

Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S40B956C5

Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Package Outlines
13–12
Stratix Device Handbook, Volume 2
1,020-Pin FineLine BGA - Flip Chip
Tables 13–11
outline figure references, respectively, for the 1,020-pin FineLine BGA
packaging.
Ordering code reference
Package acronym
Substrate material
Solder ball composition
JEDEC outline reference
Maximum lead coplanarity
Weight
Moisture sensitivity level
Table 13–11. 1,020 FineLine BGA Package Information
Table 13–12. 1,020-Pin FineLine BGA Package Outline Dimensions
All dimensions and tolerances conform to ASME Y14.5M - 1994.
Controlling dimension is in millimeters.
Pin A1 may be indicated by an ID dot, or a special feature, in its
proximity on package surface.
Symbol
A1
A2
A3
A
D
E
b
e
Description
and
13–12
show the package information and package
Min.
0.30
0.25
0.50
F
FineLine BGA
BT
Regular: 63Sn:37Pb (Typ.)
Pb-free: Sn:3Ag:0.5Cu (Typ.)
MS-034
0.008 inches (0.20 mm)
11.5 g
Printed on moisture barrier bag
Millimeters
33.00 BSC
33.00 BSC
1.00 BSC
Nom.
variation: AAP-1
0.60
Specification
Altera Corporation
Max.
3.50
3.00
2.50
0.70
July 2005

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