LAN9303-ABZJ SMSC, LAN9303-ABZJ Datasheet - Page 127

IC ETHER SW 3PORT 16BIT 56QFN

LAN9303-ABZJ

Manufacturer Part Number
LAN9303-ABZJ
Description
IC ETHER SW 3PORT 16BIT 56QFN
Manufacturer
SMSC
Datasheets

Specifications of LAN9303-ABZJ

Controller Type
Ethernet Switch Controller
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
190mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Product
Ethernet Switches
Standard Supported
Yes
Data Rate
10 Mbps/100 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
0.19 A (Typ)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1095 - EVALUATION BOARD FOR LAN9303
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1082

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9303-ABZJ
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
10.4
10.4.1
The MII mode multiplexer is used to direct the MII data/management path connections. One master
(MAC via the MII pins, or PMI) is connected to the slaves (PHY via MII pins, Port 1/2 PHYs, Virtual
PHY, and SMI slave) dependant on the selected management mode of the device. The MII mode
multiplexer also performs the multiplexing of the read data signals from the slaves and controls the
output enable of the MII pins.
The following sections detail the operation of the MII mode multiplexer in each management mode. A
list of management modes and their configuration settings are discussed in
Operation," on page
Port 0 MAC Mode SMI Managed
In Port 0 MAC mode SMI managed, the internal PHYs and SMI slave block are accessed via the MII
management pins. The Virtual PHY and PMI are not used in this mode.
The Virtual PHY interface is accessible via the SMI slave or the EEPROM Loader. Refer to
10.2, "SMI Slave Controller," on page 124
additional information.
Figure 10.1
MII Mode Multiplexer
Figure 10.1 MII Mux Management Path Connections - MAC Mode SMI Managed
MDI
MDCLK
MDI
MDCLK
MDI
MDCLK
MDI
MDCLK
Virtual PHY
SMI Slave
details the MII multiplexer management path connections for this mode.
Mode Selection
PHY2
PHY1
Management
Parallel
Parallel
Master
Slave
MDIO_ DIR
MDIO_ DIR
MDIO_ DIR
MDIO_ DIR
MDO
MDO
MDO
MDO
19.
DATASHEET
127
Mode Selection
Management
and
Section 8.4, "EEPROM Loader," on page 113
MDO MDCLK
Parallel Slave
PMI
MDI
MDO_EnN
MDO
MDI
MDC_DIR
MDC_ OUT
MDC_IN
MDIO_DIR
MII Pins
Section 2.3, "Modes of
Revision 1.4 (07-07-10)
MDIO
MDC
Section
for

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