LAN9303-ABZJ SMSC, LAN9303-ABZJ Datasheet - Page 161
![IC ETHER SW 3PORT 16BIT 56QFN](/photos/29/2/290201/lan9303_sml.jpg)
LAN9303-ABZJ
Manufacturer Part Number
LAN9303-ABZJ
Description
IC ETHER SW 3PORT 16BIT 56QFN
Manufacturer
SMSC
Specifications of LAN9303-ABZJ
Controller Type
Ethernet Switch Controller
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
190mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Product
Ethernet Switches
Standard Supported
Yes
Data Rate
10 Mbps/100 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
0.19 A (Typ)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1095 - EVALUATION BOARD FOR LAN9303
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1082
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9303-ABZJ
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
13.2.4.6
31:23
21:20
19:18
17:16
BITS
15:0
22
RESERVED
DiffPauseAddr
When set, each port may have a unique MAC address.
Port 2 Physical Address [41:40]
When
MAC Address for Port 2.
Port 1 Physical Address [41:40]
When
MAC Address for Port 1.
Port 0 Physical Address [41:40]
When
MAC Address for Port 0.
Physical Address[47:32]
This field contains the upper 16-bits (47:32) of the physical address of the
Switch Fabric MACs. Bits 41 and 10 are ignored if
Switch Fabric MAC Address High Register (SWITCH_MAC_ADDRH)
This register contains the upper 16-bits of the MAC address used by the switch for Pause frames. This
r e g i s t e r i s u s e d i n c o n j u n c t i o n w i t h
(SWITCH_MAC_ADDRL). The contents of this register are optionally loaded from the EEPROM at
power-on through the EEPROM Loader if a programmed EEPROM is detected. The least significant
byte of this register (bits [7:0]) is loaded from address 05h of the EEPROM. The second byte (bits
[15:8]) is loaded from address 06h of the EEPROM. The Host can update the contents of this field
after the initialization process has completed.
Refer to
information on how this address is loaded by the EEPROM Loader.
on page 113
DiffPauseAddr
DiffPauseAddr
DiffPauseAddr
Offset:
Section 13.2.4.7, "Switch Fabric MAC Address Low Register (SWITCH_MAC_ADDRL)"
contains additional details on using the EEPROM Loader.
is set, these bits are used as bits 41 and 40 of the
is set, these bits are used as bits 41 and 40 of the
is set, these bits are used as bits 41 and 40 of the
1F0h
DESCRIPTION
DATASHEET
161
Size:
S w i t c h F a b r i c M A C A d d r e s s L o w R e g i s t e r
DiffPauseAddr
32 bits
is set.
Section 8.4, "EEPROM Loader,"
TYPE
R/W
R/W
R/W
R/W
R/W
RO
Revision 1.4 (07-07-10)
DEFAULT
FFFFh
10b
01b
00b
0b
-
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