LAN9303-ABZJ SMSC, LAN9303-ABZJ Datasheet - Page 157

IC ETHER SW 3PORT 16BIT 56QFN

LAN9303-ABZJ

Manufacturer Part Number
LAN9303-ABZJ
Description
IC ETHER SW 3PORT 16BIT 56QFN
Manufacturer
SMSC
Datasheets

Specifications of LAN9303-ABZJ

Controller Type
Ethernet Switch Controller
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
190mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Product
Ethernet Switches
Standard Supported
Yes
Data Rate
10 Mbps/100 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
0.19 A (Typ)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1095 - EVALUATION BOARD FOR LAN9303
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1082

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9303-ABZJ
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
BITS
0
Port 0 Full-Duplex Manual Flow Control Select (MANUAL_FC_0)
This bit toggles flow control selection between manual and auto-negotiation.
0: If auto-negotiation is enabled, the auto-negotiation function
determines the flow control of switch Port 0 (RX_FC_0 and TX_FC_0
values ignored). If auto-negotiation is disabled, the RX_FC_0 and
TX_FC_0 values are used.
1: TX_FC_0 and RX_FC_0 bits determine the flow control of switch Port
0 when in full-duplex mode
Note:
Note 13.12 The default value of this field is determined by the
Note 13.13 The default value of this bit is determined by multiple strap settings. The strap values are
Note 13.14 The default value of this field is determined by the
Note 13.15 This bit is RO when in MAC mode.
Note 13.16 The default value of this field is determined by the
In MAC mode, this bit is forced high. The Virtual PHY is not
applicable in this mode and full-duplex flow control should be
controlled manually by the host based on the external PHYs Auto-
Negotiation results.
strap value is loaded during reset and can be re-written by the EEPROM Loader. Once
the EEPROM Loader re-writes the value, this register is updated with the new values. See
Section 4.2.4, "Configuration Straps," on page 45
loaded during reset and can be re-written by the EEPROM Loader. Once the EEPROM
Loader re-writes the values, this register is updated with the new values. Refer to
6.2.3, "Flow Control Enable Logic," on page 62
strap value is loaded during reset and can be re-written by the EEPROM Loader. Once
the EEPROM Loader re-writes the value, this register is updated with the new values. See
Section 4.2.4, "Configuration Straps," on page 45
The strap value is loaded during reset and can be re-written by the EEPROM Loader. Once
the EEPROM Loader re-writes the value, this register is updated with the new values. In
MAC mode, this bit is not re-written by the EEPROM Loader and has a default value of
“1”. See
Section 4.2.4, "Configuration Straps," on page 45
DESCRIPTION
DATASHEET
157
for additional information.
BP_EN_strap_0
FD_FC_strap_0
manual_FC_strap_0
for more information.
for more information.
for more information.
Note 13.15
TYPE
R/W
configuration strap. The
configuration strap. The
Revision 1.4 (07-07-10)
configuration strap.
Note 13.16
DEFAULT
Section

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