LAN9303-ABZJ SMSC, LAN9303-ABZJ Datasheet - Page 61

IC ETHER SW 3PORT 16BIT 56QFN

LAN9303-ABZJ

Manufacturer Part Number
LAN9303-ABZJ
Description
IC ETHER SW 3PORT 16BIT 56QFN
Manufacturer
SMSC
Datasheets

Specifications of LAN9303-ABZJ

Controller Type
Ethernet Switch Controller
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
190mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Product
Ethernet Switches
Standard Supported
Yes
Data Rate
10 Mbps/100 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
0.19 A (Typ)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1095 - EVALUATION BOARD FOR LAN9303
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1082

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9303-ABZJ
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
6.2.2
CSR_BUSY = 0
Switch Fabric CSR Reads
To perform a read of an individual Switch Fabric register, the read cycle must be initiated by performing
a single write to the
CSR Busy (CSR_BUSY)
address, the
(AUTO_DEC)
is cleared, indicating that the data can be read from the
(SWITCH_CSR_DATA).
A second read method may be used which utilizes the auto increment/decrement function of the
Fabric CSR Interface Command Register (SWITCH_CSR_CMD)
addresses. When using this method, the
(SWITCH_CSR_CMD)
(AUTO_DEC)
address, and the
of the
Interface Data Register
Fabric CSR Interface Command Register (SWITCH_CSR_CMD)
accordingly, and another read cycle is started automatically. The user should clear the
(AUTO_INC)
unintended read cycle.
Figure 6.2
CSR Busy (CSR_BUSY)
CSR Write
Write Data
Command
Command
illustrates the process required to perform a Switch Fabric CSR read.
Register
Register
Register
Read
Write
Idle
Figure 6.1 Switch Fabric CSR Write Access Flow Diagram
Read/Write (R_nW)
fields cleared. Valid data is available for reading when the
and
bit set, the
Read/Write (R_nW)
CSR_BUSY = 1
Auto Decrement (AUTO_DEC)
Switch Fabric CSR Interface Command Register (SWITCH_CSR_CMD)
must first be written with the
(SWITCH_CSR_DATA). When the data is read, the address in the
bit set, the
CSR Address (CSR_ADDR[15:0])
CSR_BUSY = 0
bit, at which time the data can be read from the
CSR Write Auto
bit set, and the
DATASHEET
Increment /
Decrement
CSR Address (CSR_ADDR[15:0])
bit set. The completion of a read cycle is indicated by the clearing
Command
Write Data
Command
Register
Register
Register
Write
Read
Idle
61
Switch Fabric CSR Interface Command Register
CSR_BUSY = 1
Auto Increment (AUTO_INC)
Auto Increment (AUTO_INC)
bits before reading the last data to avoid an
Switch Fabric CSR Interface Data Register
CSR_BUSY = 0
field written with the desired register
CSR Write Direct
is incremented or decremented
Address
for reading sequential register
Command
Register
Register
field set to the desired register
Range
Direct
Write
Read
Data
Idle
CSR Busy (CSR_BUSY)
CSR_BUSY = 1
and
Revision 1.4 (07-07-10)
Switch Fabric CSR
or
Auto Decrement
Auto Decrement
Auto Increment
with the
Switch
Switch
bit

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