LAN9303-ABZJ SMSC, LAN9303-ABZJ Datasheet - Page 173

• Manufacturer Part Number: LAN9303-ABZJ
• Description: IC ETHER SW 3PORT 16BIT 56QFN
• Manufacturer: SMSC

Specifications of LAN9303-ABZJ

• Controller Type: Ethernet Switch Controller
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 190mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Product: Ethernet Switches
• Standard Supported: Yes
• Data Rate: 10 Mbps/100 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 0.19 A (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• For Use With: 638-1095 - EVALUATION BOARD FOR LAN9303
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1082

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
BITS
6
5
4
3
2
1
0
MF Preamble Suppression
This bit indicates whether the Virtual PHY accepts management frames with
the preamble suppressed.
0: Management frames with preamble suppressed not accepted
1: Management frames with preamble suppressed accepted
Auto-Negotiation Complete
This bit indicates the status of the Auto-Negotiation process.
0: Auto-Negotiation process not completed
1: Auto-Negotiation process completed
Remote Fault
This bit indicates if a remote fault condition has been detected.
0: No remote fault condition detected
1: Remote fault condition detected
Auto-Negotiation Ability
This bit indicates the status of the Virtual PHY’s auto-negotiation.
0: Virtual PHY is unable to perform auto-negotiation
1: Virtual PHY is able to perform auto-negotiation
Link Status
This bit indicates the status of the link.
0: Link is down
1: Link is up
Jabber Detect
This bit indicates the status of the jabber condition.
0: No jabber condition detected
1: Jabber condition detected
Extended Capability
This bit indicates whether extended register capability is supported.
0: Basic register set capabilities only
1: Extended register set capabilities
Note 13.19 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on
Note 13.20 The Virtual PHY supports 100BASE-X (half and full duplex) and 10BASE-T (half and full
Note 13.21 The Virtual PHY does not support Register 15 or 1000 Mb/s operation. Thus this bit is
Note 13.22 The
Note 13.23 The Virtual PHY never has remote faults, its link is always up, and does not detect jabber.
Note 13.24 The VIrtual PHY supports basic and some extended register capability. The Virtual PHY
a DWORD boundary. When accessed serially (through the MII management protocol), the
register is 16-bits wide.
duplex) only. All other modes will always return as 0 (unable to perform).
always returned as 0.
the Auto-Negotiation process is run). Refer to
Negotiation," on page 102
supports Registers 0-6 (per the IEEE 802.3 specification).
Auto-Negotiation Complete
DESCRIPTION
DATASHEET
for additional details.
173
bit is first cleared on a reset, but set shortly after (when
Section 7.3.1, "Virtual PHY Auto-
TYPE
RO
RO
RO
RO
RO
RO
RO
Revision 1.4 (07-07-10)
Note 13.22
Note 13.23
Note 13.23
Note 13.23
Note 13.24
DEFAULT
0b
1b
0b
1b
1b
0b
1b