LAN9303-ABZJ SMSC, LAN9303-ABZJ Datasheet - Page 167

IC ETHER SW 3PORT 16BIT 56QFN

LAN9303-ABZJ

Manufacturer Part Number
LAN9303-ABZJ
Description
IC ETHER SW 3PORT 16BIT 56QFN
Manufacturer
SMSC
Datasheets

Specifications of LAN9303-ABZJ

Controller Type
Ethernet Switch Controller
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
190mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Product
Ethernet Switches
Standard Supported
Yes
Data Rate
10 Mbps/100 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
0.19 A (Typ)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1095 - EVALUATION BOARD FOR LAN9303
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1082

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9303-ABZJ
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
13.2.5
13.2.5.1
31:16
BITS
15:0
RESERVED
MII Data
This field contains the value read from or written to the PHYs. For a write
operation, this register should be first written with the desired data. For a
read operation, the PMI_ACCESS register is first written and once the
command is finished, this register will contain the return data.
Note:
PHY Management Interface (PMI)
The PMI registers are used to indirectly access the PHY registers. Refer to
PHY Control and Status Registers," on page 191
to
Note: The Virtual PHY registers are NOT accessible via these registers.
PHY Management Interface Data Register (PMI_DATA)
This register is used in conjunction with the
(PMI_ACCESS)
Note: The Virtual PHY registers are NOT accessible via these registers.
Section 10.3, "PHY Management Interface (PMI)," on page 126
Upon a read, the value returned depends on the
(MIIWnR)
(PMI_ACCESS). If
PHY. If
written into this register.
Offset:
MII Write (MIIWnR)
to perform read and write operations to the PHYs.
bit in the
MII Write (MIIWnR)
PHY Management Interface Access Register
0A4h
DESCRIPTION
is 1, the data is the value that was last
DATASHEET
167
is 0, the data is from the
Size:
for additional information on the PHY registers. Refer
PHY Management Interface Access Register
MII Write
32 bits
for information on the PMI.
TYPE
R/W
Section 13.3, "Ethernet
RO
Revision 1.4 (07-07-10)
DEFAULT
0000h
-

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