LSISASX12 LSI, LSISASX12 Datasheet - Page 142

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0xC01C
Read/Write
4-64
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
The following are the bit definitions for enhanced SIO mode:
The SIO Output Data Control registers provide data output control for
PHY[11:0]. Each SIO Output Data register uses one of two possible bit
field definitions. One bit field definition provides the bit definitions for the
standard SGPIO mode; the other bit field definition provides the bit
definitions for the enhanced SGPIO mode only available on the
LSISASx12A.
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
SIO bit 12: Active Device 4
SIO bit 11: Error Device 7
SIO bit 10: Locate Device 7
SIO bit 9: Active Device 7
SIO bit 8: Error Device 6
SIO bit 7: Locate Device 6
SIO bit 6: Active Device 6
SIO bit 5: Error Device 5
SIO bit 4: Locate Device 5
SIO bit 3: Active Device 5
SIO bit 2: Error Device 4
SIO bit 1: Locate Device 4
SIO bit 0: Active Device 4
SIO Output Data Control 2
16 15
8 7
0
0 0 0 0
[31:29]
[28:26]
[25:24]
[23:21]
[20:18]
[17:16]
[15:13]
[12:10]
0
[2:0]
[9:8]
[7:5]
[4:2]
[1:0]
0
0