LSISASX12 LSI, LSISASX12 Datasheet - Page 217

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x504
Read/Write
Register: 0x505
Read/Write
7
0
7
0
0
0
EMB Slave Registers
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
0
0
Transfer Attributes
Command Status
0
0
Reserved
Last Transfer
For data-in packet commands such as Receive
Diagnostics, a value of 1 indicates that the current data
in the Data FIS buffer that is to be transmitted to the host
is the last data transfer required to complete the Packet
command. For data-out packet commands such as Send
Diagnostics, a value of 1 indicates that the last block of
data read from the Data FIS buffer by the SEP is the last
data transfer required to complete the packet command.
Data Direction
A value of 0b0 indicates a data-out packet command
(host to device). A value of 0b1 indicates a data-in packet
command (device to host).
Command Status
This register contains the status of the current packet
command.
0
0
0
0
0
0
0
0
0
0
4-139
[7:2]
[7:0]
1
0