LSISASX12 LSI, LSISASX12 Datasheet - Page 48

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

2.6.2
2-26
SIO Configuration
The LED signals support all the functionality listed in
GPIO[3:0] support only the GPIO functionality, and do not support the
other functionalities listed in
configures the Group 1–4 signals for the Activity, Fault, Combo, or
Inverted Activity setting.
The Group Override registers can assign three independent blinker
definitions to any GPIO/LED signal, including GPIO[3:0]. The Group
Override register blinker settings override other configuration settings for
the signal. Each blinker definition consists of a 30-bit rotating shift
register. The user can configure the blink pattern by programming the
shift register, which can shift every 16 ms or 64 ms. Bit 0 of the shift
register determines the state of the signal.
The LSISASx12 provides LEDSYNCIN and LEDSYNCOUT pins to
synchronize the LED blink patterns between multiple LSISASx12
devices. The LEDSYNCOUT pin emits a 0.5 Hz square wave, which can
be applied to the LEDSYNCIN pin on other LSISASx12 devices to
synchronize blinker patterns on the devices. Each blinker definition has
the ability to override the blink pattern and use the 0.5 Hz LEDSYNCOUT
signal to drive the signals that the blinker definition controls.
This section describes the enhanced SGPIO interface that is available on
the LSISASx12A expander. The enhanced SGPIO interface is not
available on the LSISASx12 expander.
The SPGIO interface on the LSISASx12A can operate in a standard
SGPIO mode or in an enhanced SGPIO mode. The standard SGPIO
mode provides the same SGPIO interface that the LSISASx12 expander
provides. The enhanced SPGIO mode provides three programmable
output data control registers for each phy, and four pattern definition
registers.
describes these registers.
The SIO Control Select bit in the
the enhanced SPGIO interface. Clearing this bit places the LSISASx12A
expander in the standard SGPIO mode. Setting this bit places the
Functional Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
Note:
Section 4.2, “Configuration Manager Registers,” on page 4-3
The Group 1–4 signals support all the functionalities listed
in
Table
4.3, despite their pin names.
Table
SIO Adapter Control
4.3. The LED Group Control register
Table
register enables
4.3.