LSISASX12 LSI, LSISASX12 Datasheet - Page 82

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

4-4
Table 4.2
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
Offset
0x00050
0x00054–0x0008F
0x00090
0x00094–0x03FFF
0x4000
0x4008
0x4010
0x4018
0x4020
0x4028
0x4030
0x4038
0x4040
0x4048
0x4050
0x4058
0x4060
0x4068
0x4070
0x4078
0x4080
0x4088
0x4090
0x4098
0x40A0
0x40A8
0x040B0–0x40FF
0x4100
0x4108
0x4110
0x4118
0x4120
Configuration Manager Config Register Map (Cont.)
API2C Timer Clock Divider Control
API2C Transmit Bytes Transferred
API2C Receive Bytes Transferred
API2C Transmit Transfer Length
API2C Receive Transfer Length
API2C Master Interrupt Enable
API2C Master Interrupt Status
API2C Transmit FIFO Status
API2C Receive FIFO Status
API2C Address Register 1
API2C Address Register 2
API2C Spike Filter Control
API2C Wait Timer Control
API2C Master Command
Boot Control and Status
API2C SCL High Period
API2C SDA Setup Time
API2C t
API2C SCL Low Period
API2C Interrupt Enable
API2C SDA Hold Time
API2C Interrupt Status
API2C Global Control
Phy Receiver Polarity
API2C t
API2C Soft Reset
Register Name
API2C Monitor
API2C Data
Reserved
Reserved
Reserved
Reserved
TIMEOUT
LOW
Control
Control