LSISASX12 LSI, LSISASX12 Datasheet - Page 168

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x00C0
Read/Write
Register: 0x00C4
Read/Write
4-90
31
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Writes to the Broadcast Change Low register cause the associated link
to transmit the broadcast type. To generate a broadcast primitive, write
the attached address of the phy that originates a broadcast request to
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
24 23
Reserved
Connection Open
This read-only bit indicates is set if a connection is open.
Reserved
Transmitter Scramble Override
Setting this bit causes the transmitter to not scramble
dwords. Clearing this bit causes the transmitter to scram-
ble dwords according the SAS/SATA rules.
Receiver Descramble Control
Setting this bit causes the receiver to not descramble
dwords. Clearing this bit causes the receiver to descram-
ble dwords according the SAS/SATA rules.
Broadcast Change High Address
This field provides upper 32 bits of the 64-bit SAS
address of the most recent Broadcast Change register
written.
Broadcast Change High
Broadcast Change Low
16 15
16 15
8 7
8 7
0
0
0 0 0 0
0 0 0 0
[31:0]
0
0
[7:5]
[3:2]
0
0
0
0
4
1
0