LSISASX12 LSI, LSISASX12 Datasheet - Page 34

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

2.4
2-12
Vendor-Specific SMP Application Layer Commands
internal target addressing, address bits [63:4] are given by World Wide
Name bits [63:4], and address bits [3:0] are given by the port number
bits [3:0].
LSISASx12.
Table 2.2
The SMP Target implements the following the Vendor-Specific
commands:
The following sections describe the format for the request and response
frames associated with these commands.
Functional Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
Port
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF
WRITE N REGISTERS (0xC0)
READ N REGISTERS (0x40)
Phy 10 (when SATA device attached)
Phy 11 (when SATA device attached)
Phy 0 (when SATA device attached)
Phy 1 (when SATA device attached)
Phy 2 (when SATA device attached)
Phy 3 (when SATA device attached)
Phy 4 (when SATA device attached)
Phy 5 (when SATA device attached)
Phy 6 (when SATA device attached)
Phy 7 (when SATA device attached)
Phy 8 (when SATA device attached)
Phy 9 (when SATA device attached)
Table 2.2
Port Number Encodings
STP Target to EMB
provides the port number encodings for the
SMP Target
Definition
Reserved
Reserved