LSISASX12 LSI, LSISASX12 Datasheet - Page 187

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x0084
Read/Write
31
0 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 0 0 0 1 0 1 0 0 0
Set. Otherwise, the host assumes the device does not support the ATAPI
PACKET feature set.
This register contains the reset signature for an STP host to read in order
for it to determine that the STP Target is a PACKET device. STP hosts
have read access to the contents of these registers through the SMP
REPORT PHY SATA function.
STP Target Registers
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
SATA Dev2Host Reset FIS1
Error
This field is set to 0x01 if the device passes boot diag-
nostics.
Status
This field is set to 0x00 if there is not an error.
Reserved
Interrupt
This bit reflects the status of the interrupt bit line.
Reserved
FIS Type
This field provides the FIS type.
Dev/Head
This read-only field provides the values of the device reg-
ister and head register.
Cyl High
This read-only field provides signature byte 3. This field
is set to 0xEB, indicating that this is a PACKET device.
Cyl Low
This read-only field provides signature byte 2. This field
is set to 0x14, indicating that this is a PACKET device.
16 15
8 7
0
0 0 0 0
[31:24]
[23:16]
[31:24]
[23:16]
[13:8]
[15:8]
0
4-109
[7:0]
15
14
0
1