HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 122

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
(See Figure 6.1 on page 175 for detailed information).
122 of 273
A_SL_CFG [SLOT]
HFC-channel assignment for the selected PCM time slot and PCM output buffer configu-
ration
With this register a HFC-channel can be assigned to the selected PCM time slot. Addi-
tionally, the PCM buffers can be configured.
Before writing this array register the PCM time slot must be selected by the register
R_SLOT.
0
5..1
7..6
Bits
0
0
0
Value
Reset
Name
V_CH_DIR1
V_CH_NUM1
V_ROUT
(write only)
Data Sheet
Data flow
Description
HFC-channel number
PCM output buffer configuration
HFC-channel data direction
’0’ = HFC-channel for transmit data
’1’ = HFC-channel for receive data
(0 . . . 31)
For transmit time slots:
’00’ = disable output buffers, no data transmision
’01’ = transmit data internally, output buffers
disabled
’10’ = output buffer enable for STIO1
’11’ = output buffer enable for STIO2
For receive time slots:
’00’ = input data is ignored
’01’ = loop PCM data internally
’10’ = data in from STIO2
’11’ = data in from STIO1
March 2003 (rev. A)
Cologne
Chip
0xD0