HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 198

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HFC-4S

Manufacturer Part Number
HFC-4S
Description
Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
Manufacturer
Cologne Chip AG
Datasheet
HFC-4S
HFC-8S
198 of 273
The settings for the second PCM conference member is quite similar.
Finally the S/T conference member must loop back its data via the PCM interface. This is
normally done internally, i.e. the PCM output buffers are both disabled (see Chapter 6 for
details). A pair of FIFOs is used to configure the PCM-to-S/T connection but no data is stored
in these FIFOs.
R_SLOT
A_SL_CFG[5,TX] : V_CH_DIR1
A_CONF[5,TX]
R_SLOT
A_SL_CFG[5,RX] : V_CH_DIR1
A_CONF[5,RX]
R_SLOT
A_SL_CFG[20,TX] : V_CH_DIR1
A_CONF[20,TX]
R_SLOT
A_SL_CFG[20,RX] : V_CH_DIR1
A_CONF[20,RX]
R_FIFO
A_CON_HDLC[11,TX] : V_DATA_FLOW
A_CHANNEL[11,TX] : V_CH_DIR0
R_SLOT
A_SL_CFG[6,RX]
A_CONF[6,RX]
Multiparty audio conferences
: V_SL_DIR
: V_SL_NUM
: V_CH_NUM1
: V_CONF_NUM
: V_CONF_SL
: V_SL_DIR
: V_SL_NUM
: V_CH_NUM1
: V_CONF_SL
: V_SL_DIR
: V_SL_NUM
: V_CH_NUM1
: V_CONF_NUM
: V_CONF_SL
: V_SL_DIR
: V_SL_NUM
: V_CH_NUM1
: V_CONF_SL
: V_FIFO_DIR
: V_FIFO_NUM
: V_CH_NUM0
: V_SL_DIR
: V_SL_NUM
: V_CH_DIR1
: V_CH_NUM1
: V_CONF_SL
Data Sheet
1
0
0
5
6
1
20
1
6
0
0
0
2
5
6
1
0
20
1
6
2
1
0
’110’
0
1
0
0
11
4
6
4
(receive slot)
(slot #5)
(transmit HFC-channel)
(HFC-channel #6)
(disable conference)
(transmit slot)
(transmit HFC-channel)
(conference #2)
(enable conference)
(slot #5)
(HFC-channel #6)
(receive slot)
(slot #20)
(receive HFC-channel)
(HFC-channel #6)
(disable conference)
(transmit slot)
(slot #20)
(receive HFC-channel)
(HFC-channel #6)
(conference #2)
(enable conference)
(transmit FIFO)
(S/T
(transmit HFC-channel)
(receive slot)
(transmit HFC-channel)
(disable conference)
(FIFO #11)
(HFC-channel #4)
(slot #6)
(HFC-channel #4)
PCM)
March 2003 (rev. A)
Cologne
Chip

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