HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 225

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

March 2003 (rev. A)
HFC-4S
HFC-8S
R_BRG_TIM3
Auxiliary bridge timing configuration register for timing 3
3..0
7..4
R_BRG_TIM_SEL01
Timing selection for bridge device connected to /BRG_CS0 and /BRG_CS1
Every selection uses a timing defined in R_BRG_TIM0 . . . R_BRG_TIM3.
1..0
3..2
5..4
7..6
Bits
Bits
0
0
0
0
0
0
Value
Value
Reset
Reset
V_BRG_TIM3_IDLE
V_BRG_TIM3_CLK
V_BRG_WR_SEL0
V_BRG_RD_SEL0
V_BRG_WR_SEL1
V_BRG_RD_SEL1
Name
Name
Auxiliary interface
(write only)
(write only)
Data Sheet
Description
Idle cycles
Number of idle clock cycles for read / write signal
Active cycles
Number of active clock cycles for read / write signal
Description
WR-timing selection for the chip connected to
pin /BRG_CS0
RD-timing selection for the chip connected to
pin /BRG_CS0
WR-timing selection for the chip connected to
pin /BRG_CS1
RD-timing selection for the chip connected to
pin /BRG_CS1
Cologne
Chip
225 of 273
0x4C
0x4B