HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 94

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
3.1 Data flow concept
The HFC-4S / 8S has a programmable data flow unit, in which the FIFOs are connected with the PCM
and the S/T interfaces. Moreover the data flow unit can directly connect PCM and S/T interfaces or
two PCM time slots
The fundamental features of the HFC-4S / 8S data flow are as follows:
The complete HFC-4S / 8S data flow block diagram is shown in Figure 3.1. Basically, data routing
requires an allocation number at each block. So there are three areas where numbering is based on
FIFOs, HFC-channels and PCM time slots.
interface
interface
FIFO handling and HDLC controller, PCM and S/T interfaces are described in Chapters 4 to 6. So
this chapter deals with the data flow unit which is located between and including the channel assigner,
the PCM slot assigner and the S/T interface assigner.
Term definitions
Figure 3.2 clarifies the relationship and the differences between the numbering of FIFOs, HFC-
channels and PCM time slots. The inner circle symbolizes the HFC-channel oriented part of the
data flow, while the outer circle shows the connection of three data sources and data drains respec-
tively. The S/T interfaces have a fixed mapping between HFC-channels and S/T-channels so that there
is no need of a separate S/T-channel numbering.
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host
host
programmable interconnection capability between FIFOs, PCM time slots and S/T-channels
4 (HFC-4S) resp. 8 (HFC-8S) S/T interfaces
in transmit and receive direction there are
3 data flow modes to satisfy different application tasks
subchannel processing for bitwise data handling
– up to 32 FIFOs
– 16, 32 or 64 PCM time slots
– 32 HFC-channels to connect the above-mentioned data interfaces
controller
controller
FIFO
FIFO
1
.
transparent
transparent
controller
controller
HDLC
HDLC
HDLC
HDLC
data
data
FIFO
or
or
Figure 3.1: Data flow block diagram
assigner
assigner
channel
channel
Data Sheet
Data flow
subchannel
subchannel
processor
processor
decomposition
decomposition
construction /
construction /
HFC-channel
HFC-channel
byte
byte
channel
controller
controller
flow
flow
March 2003 (rev. A)
S/T interf.
S/T interf.
PCM slot
PCM slot
assigner
assigner
assigner
assigner
slot
Cologne
Chip
interfaces
interfaces
interface
interface
multiple
multiple
PCM
PCM
S/T
S/T