MPC8548E Freescale, MPC8548E Datasheet - Page 128

• Manufacturer Part Number: MPC8548E
• Description: Integrated Processor
• Manufacturer: Freescale

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System Design Information
21.2
21.2.1
Each of the PLLs listed above is provided with power through independent power supply pins
(AV
level should always be equivalent to V
through a low frequency filter scheme such as the following.
There are a number of ways to reliably provide power to the PLLs, but the recommended solution is to
provide independent filter circuits per PLL power supply as illustrated in
AV
one PLL to the other is reduced.
This circuit is intended to filter noise in the PLLs resonant frequency range from a 500 kHz to 10 MHz
range. It should be built with surface mount capacitors with minimum Effective Series Inductance (ESL).
Consistent with the recommendations of Dr. Howard Johnson in High Speed Digital Design: A Handbook
of Black Magic (Prentice Hall, 1993), multiple small capacitors of equal value are recommended over a
single large value capacitor.
Each circuit should be placed as close as possible to the specific AV
noise coupled from nearby circuits. It should be possible to route directly from the capacitors to the AV
pin, which is on the periphery of the footprint, without the inductance of vias.
Figure 56
128
DD
DD
pins. By providing independent filters to each PLL the opportunity to cause noise injection from
_PLAT, AV
Power Supply Design
through
PLL Power Supply Filtering
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 4
DD
Figure 58
V
V
V
_CORE, AV
DD
DD
DD
Figure 58. PLL Power Supply Filter Circuit with PCI/LBIU Pins
Figure 57. PLL Power Supply Filter Circuit with CORE Pins
Figure 56. PLL Power Supply Filter Circuit with PLAT Pins
shows the PLL power supply filter circuits.
150 Ω
180 Ω
10 Ω
DD
_PCI, AV
DD
2.2 µF
2.2 µF
2.2 µF
, and preferably these voltages will be derived directly from V
DD
GND
GND
GND
_LBIU, and AV
Low ESL Surface Mount Capacitors
Low ESL Surface Mount Capacitors
Low ESL Surface Mount Capacitors
2.2 µF
2.2 µF
2.2 µF
DD
AV
AV
AV
DD
_SRDS, respectively). The AV
DD
DD
DD
pin being supplied to minimize
_PLAT
_CORE
_PCI/AV
Figure
DD
56, one to each of the
_LBIU
Freescale Semiconductor
DD
DD
DD