MPC8548E Freescale, MPC8548E Datasheet - Page 31

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MPC8548E

Manufacturer Part Number
MPC8548E
Description
Integrated Processor
Manufacturer
Freescale
Datasheet

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Figure 10
8.2.3
This section describes the MII transmit and receive AC timing specifications.
8.2.3.1
Table 27
Freescale Semiconductor
TX_CLK clock period 10 Mbps
TX_CLK clock period 100 Mbps
TX_CLK duty cycle
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
TX_CLK data clock rise (20%–80%)
TX_CLK data clock fall (80%–20%)
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. Guaranteed by design.
inputs and t
timing (MT) for the time t
the clock reference symbol representation is based on two to three letters representing the clock of a particular functional.
For example, the subscript of t
used with the appropriate letter: R (rise) or F (fall).
provides the MII transmit AC timing specifications.
shows the GMII receive AC timing diagram.
MII AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
MII Transmit AC Timing Specifications
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 4
RXD[7:0]
RX_CLK
Parameter/Condition
RX_DV
RX_ER
MTX
clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in general,
MTX
Table 27. MII Transmit AC Timing Specifications
Figure 10. GMII Receive AC Timing Diagram
represents the MII(M) transmit (TX) clock. For rise and fall times, the latter convention is
t
t
GRXH
GRDVKH
t
GRX
t
t
MTXH/
Symbol
GRXF
t
MTKHDX
t
t
t
MTXR
MTXF
(first two letters of functional block)(signal)(state)(reference)(state)
t
MTX
for outputs. For example, t
MTX
t
GRDXKH
t
MTX
2
2
2
1
t
GRXR
Min
1.0
1.0
35
1
Enhanced Three-Speed Ethernet (eTSEC)
MTKHDX
Typ
400
40
5
symbolizes MII transmit
Max
4.0
4.0
65
15
Unit
ns
ns
ns
ns
ns
%
for
31

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