MPC8548E Freescale, MPC8548E Datasheet - Page 133

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MPC8548E

Manufacturer Part Number
MPC8548E
Description
Integrated Processor
Manufacturer
Freescale
Datasheet

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use left-to-right then top-to-bottom. Still others number the pins counter-clockwise from pin 1 (as with an
IC). Regardless of the numbering scheme, the signal placement recommended in
all known emulators.
21.9.1
If the JTAG interface and COP header will not be used, Freescale recommends the following connections:
Freescale Semiconductor
TRST should be tied to HRESET through a 0 kΩ isolation resistor so that it is asserted when the
system reset signal (HRESET) is asserted, ensuring that the JTAG scan chain is initialized during
the power-on reset flow. Freescale recommends that the COP header be designed into the system
as shown in
in case a JTAG interface may need to be wired onto the system in future debug situations.
No pull-up/pull-down is required for TDI, TMS, TDO, or TCK.
Termination of Unused Signals
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 4
Figure
62. If this is not possible, the isolation resistor will allow future access to TRST
COP_CHKSTP_OUT
COP_RUN/STOP
Figure 61. COP Connector Physical Pinout
COP_HRESET
COP_SRESET
COP_TDO
COP_TMS
COP_TCK
COP_TDI
13
15
11
1
1
3
5
7
9
No pin
KEY
10
12
16
2
4
6
8
NC
COP_TRST
COP_VDD_SENSE
COP_CHKSTP_IN
NC
NC
GND
Figure 61
System Design Information
is common to
133

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