MPC8548E Freescale, MPC8548E Datasheet - Page 69

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MPC8548E

Manufacturer Part Number
MPC8548E
Description
Integrated Processor
Manufacturer
Freescale
Datasheet

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16.3
The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)
of each other at all times. This is specified to allow bit rate clock sources with a ±300 ppm tolerance.
16.4
The following is a summary of the specifications for the physical layer of PCI Express on this device. For
further details as well as the specifications of the transport and data link layer refer to PCI Express Base
Specification. Rev. 1.0a.
16.4.1
Table 51
specified at the component pins.
Freescale Semiconductor
T
T
TX-EYE-MEDIAN-to-
TX-RISE
V
V
V
MAX-JITTER
TX-DE-RATIO
Symbol
TX-DIFFp-p
TX-CM-ACp
T
TX-EYE
UI
defines the specifications for the differential output at all transmitters (TXs). The parameters are
, T
Clocking Dependencies
Physical Layer Specifications
TX-FALL
Differential Transmitter (TX) Output
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 4
Minimum TX eye
jitter median and
D+/D– TX output
De- emphasized
common mode
Maximum time
RMS AC peak
output voltage
output voltage
deviation from
output voltage
peak-to-peak
between the
Unit interval
rise/fall time
the median.
Parameter
Differential
differential
maximum
Table 51. Differential Transmitter (TX) Output Specifications
(ratio)
width
399.88
0.125
–3.0
0.70
Min
0.8
Nom
–3.5
400
400.12
Max
–4.0
0.15
1.2
20
Unit
mV
dB
ps
UI
UI
UI
V
Each UI is 400 ps ± 300 ppm. UI does not account
for spread spectrum clock dictated variations.
See Note 1.
V
Ratio of the V
following bits after a transition divided by the
V
See Note 2.
The maximum transmitter jitter can be derived as
T
See Notes 2 and 3.
Jitter is defined as the measurement variation of
the crossing points (V
to a recovered TX UI. A recovered TX UI is
calculated over 3500 consecutive unit intervals of
sample data. Jitter is measured using all edges of
the 250 consecutive UI in the center of the 3500
UI used for calculating the TX UI.
See Notes 2 and 3.
See Notes 2 and 5.
V
V
V
See Note 2.
TX-MAX-JITTER
TX-DIFFp-p
TX-DIFFp-p
TX-CM-ACp
TX-CM-DC
TX-CM-DC
)
= DC
of the first bit after a transition.
= 2*|V
= RMS(|V
TX-DIFFp-p
= 1 – T
(avg)
TX-D+
Comments
of |V
TXD+
TX-DIFFp-p
TX-EYE
– V
of the second and
TX-D+
+ V
TX-D–
= 0.3 UI.
TXD–
+ V
= 0 V) in relation
|. See Note 2.
TX-D–
|/2 –
PCI Express
|/2.
69

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