MPC8548E Freescale, MPC8548E Datasheet - Page 68

• Manufacturer Part Number: MPC8548E
• Description: Integrated Processor
• Manufacturer: Freescale

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PCI Express
15.3
Figure 47
The DC and AC specification of SerDes data lanes are defined in each interface protocol section below
(PCI Express, Serial Rapid IO, or SGMII) in this document based on the application usage:
Note that external an AC
with the capacitor value defined in the specification of each protocol section.
16 PCI Express
This section describes the DC and AC electrical specifications for the PCI Express bus of the MPC8548E.
16.1
For more information, see
16.2
Table 50
68
Note:
1. Typical based on PCI Express Specification 2.0 .
Symbol
t
t
REFCJ
REFPJ
t
REF
•
•
Section 16, “PCI Express”
Section 17, “Serial RapidIO”
lists the AC requirements for the PCI Express SerDes clocks.
SerDes Transmitter and Receiver Reference Circuits
DC Requirements for PCI Express SD_REF_CLK and
REFCLK cycle time
REFCLK cycle-to-cycle jitter. Difference in the period of any two
adjacent REFCLK cycles.
Phase jitter. Deviation in edge location with respect to mean edge
location.
SD_REF_CLK
AC Requirements for PCI Express SerDes Clocks
shows the reference circuits for SerDes data lane’s transmitter and receiver.
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 4
Transmitter
Figure 47. SerDes Transmitter and Receiver Reference Circuits
Table 50. SD_REF_CLK and SD_REF_CLK AC Requirements
coupling
Section 15.2, “SerDes Reference Clocks.”
Parameter Description
50 Ω
50 Ω
SD_TX n
SD_TX n
capacitor is required for the above three serial transmission protocols
SD_RX n
SD_RX n
50 Ω
50 Ω
Min
–50
—
—
Receiver
Typ
10
—
—
Freescale Semiconductor
Max
100
50
—
Unit
ns
ps
ps
Notes
—
—
1