LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 10

• Manufacturer Part Number: LM3S2965-IQC20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Table of Contents
Figure 15-12. Master Burst SEND after Burst RECEIVE ........................................................................ 376
Figure 15-13. Slave Command Sequence ............................................................................................ 377
Figure 16-1.
Figure 16-2.
Figure 17-1.
Figure 17-2.
Figure 17-3.
Figure 18-1.
Figure 18-2.
Figure 18-3.
Figure 18-4.
Figure 18-5.
Figure 19-1.
Figure 19-2.
Figure 20-1.
Figure 23-1.
Figure 23-2.
Figure 23-3.
Figure 23-4.
Figure 23-5.
Figure 23-6.
Figure 23-7.
Figure 23-8.
Figure 23-9.
Figure 23-10. External Reset Timing (RST) ........................................................................................... 533
Figure 23-11. Power-On Reset Timing ................................................................................................. 534
Figure 23-12. Brown-Out Reset Timing ................................................................................................ 534
Figure 23-13. Software Reset Timing ................................................................................................... 534
Figure 23-14. Watchdog Reset Timing ................................................................................................. 534
Figure 24-1.
10
CAN Module Block Diagram ........................................................................................... 402
CAN Bit Time ................................................................................................................ 409
Analog Comparator Module Block Diagram ..................................................................... 446
Structure of Comparator Unit .......................................................................................... 447
Comparator Internal Reference Structure ........................................................................ 448
PWM Module Block Diagram .......................................................................................... 458
PWM Count-Down Mode ................................................................................................ 459
PWM Count-Up/Down Mode .......................................................................................... 460
PWM Generation Example In Count-Up/Down Mode ....................................................... 460
PWM Dead-Band Generator ........................................................................................... 461
QEI Block Diagram ........................................................................................................ 490
Quadrature Encoder and Velocity Predivider Operation .................................................... 491
Pin Connection Diagram ................................................................................................ 506
Load Conditions ............................................................................................................ 526
I
Hibernation Module Timing ............................................................................................. 529
SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 530
SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 530
SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 531
JTAG Test Clock Input Timing ......................................................................................... 532
JTAG Test Access Port (TAP) Timing .............................................................................. 532
JTAG TRST Timing ........................................................................................................ 532
100-Pin LQFP Package .................................................................................................. 535
2
C Timing ..................................................................................................................... 529
Preliminary
June 04, 2007