LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 470

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LM3S2965-IQC20-A0T

Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Pulse Width Modulator (PWM)
PWM Interrupt Enable (PWMINTEN)
Base 0x4002.8000
Offset 0x014
Type R/W, reset 0x0000.0000
470
Reset
Reset
Type
Type
Bit/Field
31:17
15:3
16
2
1
0
RO
RO
31
15
0
0
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014
This register controls the global interrupt generation capabilities of the PWM module. The events
that can cause an interrupt are the fault input and the individual interrupts from the PWM generators.
RO
RO
30
14
0
0
IntPWM2
IntPWM1
IntPWM0
reserved
reserved
IntFault
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
R/W
R/W
R/W
0
0
RO
RO
RO
RO
26
10
0
0
Reset
reserved
0
0
0
0
0
0
RO
RO
25
0
9
0
Preliminary
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
When 1, an interrupt occurs when the fault input is asserted.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
When 1, an interrupt occurs when the PWM generator 2 block asserts
an interrupt.
When 1, an interrupt occurs when the PWM generator 1 block asserts
an interrupt.
When 1, an interrupt occurs when the PWM generator 0 block asserts
an interrupt.
RO
RO
24
0
8
0
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
IntPWM2
R/W
RO
18
0
2
0
June 04, 2007
IntPWM1
R/W
RO
17
0
1
0
IntPWM0
IntFault
R/W
R/W
16
0
0
0

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