LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 286

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LM3S2965-IQC20-A0T

Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Analog-to-Digital Converter (ADC)
ADC Sample Sequence Control 3 (ADCSSCTL3)
Base 0x4003.8000
Offset 0x0A4
Type R/W, reset 0x0000.0002
286
Reset
Reset
Type
Type
Bit/Field
31:4
3
2
1
0
RO
RO
31
15
0
0
Register 24: ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4
This register contains the configuration information for each sample for a sequence executed with
Sample Sequencer 3. The END bit is always set since there is only one sample in this sequencer.
This register is 4-bits wide and contains information for one possible sample.
RO
RO
30
14
0
0
reserved
Name
END0
TS0
IE0
D0
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
R/W
R/W
R/W
0
0
RO
RO
RO
26
10
0
0
reserved
Reset
0
0
0
0
0
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Same definition as TS7 but used during the first sample.
Same definition as IE7 but used during the first sample.
Same definition as END7 but used during the first sample.
Since this sequencer has only one entry, this bit must be set.
Same definition as D7 but used during the first sample.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
R/W
TS0
RO
19
0
3
0
R/W
RO
IE0
18
0
2
0
June 04, 2007
END0
R/W
RO
17
0
1
0
R/W
RO
D0
16
0
0
0

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