LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 164

• Manufacturer Part Number: LM3S2965-IQC20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

General-Purpose Input/Outputs (GPIOs)
9.1.6
9.2
Table 9-1. GPIO Pad Configuration Examples
a. X=Ignored (don’t care bit)
?=Can be either 0 or 1, depending on the configuration
164
Configuration
Digital Input (GPIO)
Digital Output (GPIO)
Open Drain Input
(GPIO)
Open Drain Output
(GPIO)
Open Drain
Input/Output (I
Digital Input (Timer
CCP)
Digital Input (QEI)
Digital Output (PWM)
Digital Output (Timer
PWM)
Digital Input/Output
(SSI)
Digital Input/Output
(UART)
Analog Input
(Comparator)
Digital Output
(Comparator)
2
Identification
The identification registers configured at reset allow software to detect and identify the module as
a GPIO block. The identification registers include the GPIOPeriphID0-GPIOPeriphID7 registers as
well as the GPIOPCellID0-GPIOPCellID3 registers.
Initialization and Configuration
To use the GPIO, the peripheral clock must be enabled by setting the appropriate GPIO Port bit
field (GPIOn) in the RCGC2 register.
On reset, all GPIO pins (except for the five JTAG pins) are configured out of reset to be undriven
(tristate): GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0, and GPIOPUR=0. Table 9-1 on page 164
shows all possible configurations of the GPIO pads and the control register settings required to
achieve them. Table 9-2 on page 165 shows how a rising edge interrupt would be configured for pin
2 of a GPIO port.
C)
GPIO Register Bit Value
AFSEL
0
0
0
0
1
1
1
1
1
1
1
0
1
DIR
X
X
X
X
X
X
X
X
0
1
0
1
0
ODR
a
0
0
1
1
1
0
0
0
0
0
0
0
0
DEN
Preliminary
1
1
1
1
1
1
1
1
1
1
1
0
1
PUR
?
?
X
X
X
?
?
?
?
?
?
0
?
PDR
?
?
X
X
X
?
?
?
?
?
?
0
?
DR2R
X
X
X
X
X
?
?
?
?
?
?
?
?
DR4R
X
X
X
X
X
?
?
?
?
?
?
?
?
DR8R
X
X
X
X
X
?
?
?
?
?
?
?
?
June 04, 2007
SLR
X
X
X
X
X
?
?
?
?
?
?
?
?