LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 165

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LM3S2965-IQC20-A0T

Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Table 9-2. GPIO Interrupt Configuration Example
a. X=Ignored (don’t care bit)
9.3
June 04, 2007
Register
GPIOIS
GPIOIBE
GPIOIEV
GPIOIM
Desired
Interrupt
Event
Trigger
0=Low level,
1=High level,
or negative
0=masked
Register Map
“Register Map” on page 166 lists the GPIO registers. The offset listed is a hexadecimal increment
to the register’s address, relative to that GPIO port’s base address:
Important:
Note:
or positive
0=single
masked
0=edge
1=level
1=both
edges
1=not
edge
edge
edge
GPIO Port A: 0x4000.4000
GPIO Port B: 0x4000.5000
GPIO Port C: 0x4000.6000
GPIO Port D: 0x4000.7000
GPIO Port E: 0x4002.4000
GPIO Port F: 0x4002.5000
GPIO Port G: 0x4002.6000
GPIO Port H: 0x4002.7000
The default reset value for the GPIOAFSEL, GPIOPUR, and GPIODEN registers are
0x0000.0000 for all GPIO pins, with the exception of the five JTAG/SWD pins (PB7 and
PC[3:0]). These five pins default to JTAG/SWD functionality. Because of this, the default
reset value of these registers for GPIO Port B is 0x0000.0080 while the default reset value
for Port C is 0x0000.000F.
Pin 2 Bit Value
7
The GPIO registers in this chapter are duplicated in each GPIO block, however,
depending on the block, all eight bits may not be connected to a GPIO pad. In those
cases, writing to those unconnected bits has no effect and reading those unconnected
bits returns no meaningful data.
X
X
X
0
6
a
X
X
X
0
5
X
X
X
0
Preliminary
4
X
X
X
0
3
X
X
X
0
2
0
0
1
1
LM3S2965 Microcontroller
1
X
X
X
0
0
X
X
X
0
165

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