LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 419

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LM3S2965-IQC20-A0T

Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
June 04, 2007
Bit/Field
2:0
Name
LEC
Type
R/W
Reset
0x0
Preliminary
Description
Last Error Code (type of the last error to occur on the CAN bus)
Value
000
001
010
011
100
101
110
111
Definition
No Error
Stuff Error
More than 5 equal bits in a sequence have occurred in a part
of a received message where this is not allowed.
Form Error
A fixed format part of the received frame has the wrong format.
ACK Error
The message transmitted was not acknowledged by another
node.
Bit 1 Error
When a message is transmitted, the CAN controller monitors
the data lines to detect any conflicts. When the arbitration field
is transmitted, data conflicts are a part of the arbitration protocol.
When other frame fields are transmitted, data conflicts are
considered errors.
A Bit 1 Error indicates that the device wanted to send a High
level (logical 1) but the monitored bus value was Low (logical
0).
Bit 0 Error
A Bit 0 Error indicates that the device wanted to send a Low
level (logical 0) but the monitored bus value was High (logical
1).
During bus-off recovery, this status is set each time a sequence
of 11 High bits has been monitored. This enables the CPU to
monitor the proceeding of the bus-off recovery sequence without
any disturbances to the bus.
CRC Error
The CRC checksum was incorrect in the received message
indicate that the calculated value received did not match the
calculated CRC of the data.
Unused
When the LEC bit shows this value, no CAN bus event was
detected since the CPU wrote this value to LEC.
LM3S2965 Microcontroller
419

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