LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 89
![no-image](/images/no-image-200.jpg)
LM3S2965-IQC20-A0T
Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S2965-IQC20-A0T.pdf
(542 pages)
- Current page: 89 of 542
- Download datasheet (5Mb)
Device Capabilities 2 (DC2)
Base 0x400F.E000
Offset 0x014
Type RO
June 04, 2007
Reset
Reset
Type
Type
Bit/Field
31:27
23:20
11:10
26
25
24
19
18
17
16
15
14
13
12
9
8
reserved
RO
RO
31
15
0
0
Register 15: Device Capabilities 2 (DC2), offset 0x014
This register is predefined by the part and can be used to verify features.
I2C1
RO
RO
30
14
0
1
reserved
reserved
reserved
reserved
reserved
TIMER3
TIMER2
TIMER1
TIMER0
COMP2
COMP1
COMP0
reserved
reserved
Name
QEI1
QEI0
I2C1
I2C0
RO
RO
29
13
0
0
I2C0
RO
RO
28
12
0
1
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
reserved
COMP2
RO
RO
26
10
1
0
Reset
COMP1
0
1
1
1
0
1
1
1
1
0
1
0
1
0
1
1
QEI1
RO
RO
25
1
9
1
Preliminary
COMP0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
When set, indicates that analog comparator 2 is present.
When set, indicates that analog comparator 1 is present.
When set, indicates that analog comparator 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
When set, indicates that General-Purpose Timer module 3 is present.
When set, indicates that General-Purpose Timer module 2 is present.
When set, indicates that General-Purpose Timer module 1 is present.
When set, indicates that General-Purpose Timer module 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
When set, indicates that I2C module 1 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
When set, indicates that I2C module 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
When set, indicates that QEI module 1 is present.
When set, indicates that QEI module 0 is present.
QEI0
RO
RO
24
1
8
1
RO
RO
23
0
7
0
reserved
RO
RO
22
0
6
0
reserved
SSI1
RO
RO
21
0
5
1
SSI0
RO
RO
20
0
4
1
LM3S2965 Microcontroller
reserved
TIMER3
RO
RO
19
1
3
0
TIMER2
UART2
RO
RO
18
1
2
1
TIMER1
UART1
RO
RO
17
1
1
1
TIMER0
UART0
RO
RO
16
1
0
1
89
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