LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 366

• Manufacturer Part Number: LM3S2965-IQC20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Inter-Integrated Circuit (I
15
15.1
15.2
366
Inter-Integrated Circuit (I
The Inter-Integrated Circuit (I
(a serial data line SDA and a serial clock line SCL), and interfaces to external I
serial memory (RAMs and ROMs), networking devices, LCDs, tone generators, and so on. The I
bus may also be used for system testing and diagnostic purposes in product development and
manufacture. The LM3S2965 microcontroller includes onetwo I
to interact (both send and receive) with other I
Devices on the I
module supports both sending and receiving data as either a master or a slave, and also supports
the simultaneous operation as both a master and a slave. There are a total of four I
Transmit, Master Receive, Slave Transmit, and Slave Receive. The Stellaris
can operate at two speeds: Standard (100 Kbps) and Fast (400 Kbps).
Both the I
a transmit or receive operation completes (or aborts due to an error) and the I
interrupts when data has been sent or requested by a master.
Block Diagram
Figure 15-1. I
Functional Description
TheEach I
separate peripherals. For proper operation, the SDA and SCL pins must be connected to bi-directional
open-drain pads. A typical I
See “I
Interrupt
2
C” on page 528 for I
2
C master and slave can generate interrupts; the I
2
2
C module is comprised of both master and slave functions which are implemented as
C) Interface
I2CMTPR
I2CMIMR
2
I2CMRIS
I2CMMIS
I2CMICR
I2CMDR
I2CMCR
I2CMSA
I2CMCS
C Block Diagram
2
C bus can be designated as either a master or a slave. TheEach Stellaris
I
2
C Control
2
2
C timing diagrams.
C bus configuration is shown in Figure 15-2 on page 367.
2
I2CSOAR
I2CSCSR
I2CSRIS
I2CSMIS
I2CSICR
I2CSDR
I2CSIM
C) bus provides bi-directional data transfer through a two-wire design
Preliminary
2
C devices on the bus.
2
I
2
I
C) Interface
2
C Master Core
C Slave Core
2
C master generates interrupts when
2
I2CSCL
I2CSDA
I2CSCL
I2CSDA
C modules, providing the ability
®
I
2
C I/O Select
I
2
2
C modulemodules
2
C slave generates
C devices such as
2
C modes: Master
June 04, 2007
I2CSCL
I2CSDA
®
I
2
C
2
C