LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 435

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LM3S2965-IQC20-A0T

Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
CAN IF1 Message Control (CANIF1MCTL)
CAN0 base: 0x4004.0000
CAN1 base: 0x4004.1000
Offset 0x038
Type R/W, reset 0x0000.0000
June 04, 2007
Reset
Reset
Type
Type
Bit/Field
31:16
15
14
13
12
NewDat
R/W
RO
31
15
0
0
Register 20: CAN IF1 Message Control (CANIF1MCTL), offset 0x038
Register 21: CAN IF2 Message Control (CANIF2MCTL), offset 0x098
This register holds the control information associated with the message object to be sent to the
Message RAM.
MsgLst
R/W
RO
30
14
0
0
reserved
NewDat
MsgLst
UMask
IntPnd
Name
IntPnd
R/W
RO
29
13
0
0
UMask
R/W
RO
28
12
0
0
TxIE
R/W
RO
Type
27
11
R/W
R/W
R/W
R/W
0
0
RO
RxIE
R/W
RO
26
10
0
0
0x0000
Reset
0x0
0x0
0x0
0x0
RmtEn
R/W
RO
25
0
9
0
Preliminary
TxRqst
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
New Data
0: No new data has been written into the data portion of this message
object by the message handler since the last time this flag was cleared
by the CPU.
1: The message handler or the CPU has written new data into the data
portion of this message object.
Message Lost
0 : No message was lost since the last time this bit was reset by the
CPU.
1: The message handler stored a new message into this object when
NewDat was set; the CPU has lost a message.
This bit is only valid for message objects with the Dir bit in the
CANIFnARB2 register set to 0 (receive).
Interrupt Pending
0: This message object is not the source of an interrupt.
1: This message object is the source of an interrupt. The interrupt
identifier in the CAN Interrupt (CANINT) register will point to this
message object if there is not another interrupt source with a higher
priority.
Use Acceptance Mask
0: Mask ignored.
1: Use mask (Msk, MXtd, and MDir) for acceptance filtering.
R/W
RO
24
0
8
0
reserved
R/W
EoB
RO
23
0
7
0
RO
RO
22
0
6
0
reserved
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S2965 Microcontroller
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
DLC
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
435

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