LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 409

• Manufacturer Part Number: LM3S2965-IQC20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

June 04, 2007
remain inside a specific oscillator's tolerance range, the CAN nodes are able to compensate for the
different bit rates by periodically resynchronizing to the bit stream.
According to the CAN specification, the bit time is divided into four segments (see Figure
16-2 on page 409): the Synchronization Segment, the Propagation Time Segment, the Phase Buffer
Segment 1, and the Phase Buffer Segment 2. Each segment consists of a specific, programmable
number of time quanta (see Table 16-3 on page 409). The length of the time quantum (tq), which
is the basic time unit of the bit time, is defined by the CAN controller's system clock (fsys) and the
Baud Rate Prescaler (BRP):
tq = BRP / fsys
The CAN module's system clock fsys is the frequency of its CAN module clock (CAN_CLK) input.
The Synchronization Segment Sync_Seg is that part of the bit time where edges of the CAN bus
level are expected to occur; the distance between an edge that occurs outside of Sync_Seg and
the Sync_Seg is called the phase error of that edge.
The Propagation Time Segment Prop_Seg is intended to compensate for the physical delay times
within the CAN network.
The Phase Buffer Segments Phase_Seg1 and Phase_Seg2 surround the Sample Point.
The (Re-)Synchronization Jump Width (SJW) defines how far a resynchronization may move the
Sample Point inside the limits defined by the Phase Buffer Segments to compensate for edge phase
errors.
A given bit rate may be met by different bit-time configurations, but for the proper function of the
CAN network, the physical delay times and the oscillator's tolerance range have to be considered.
Figure 16-2. CAN Bit Time
Table 16-3. CAN Protocol Ranges
Parameter
BRP
Sync_Seg
Prop_Seg
Phase_Seg1
Phase_Seg2
Range
[1 .. 32]
1 t
[1 .. 8] t
[1 .. 8] t
[1 .. 8] t
q
q
q
q
Remark
Defines the length of the time quantum t
Fixed length, synchronization of bus input to system clock
Compensates for the physical delay times
May be lengthened temporarily by synchronization
May be shortened temporarily by synchronization
a
Preliminary
q
LM3S2965 Microcontroller
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