LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 233
LM3S2965-IQC20-A0T
Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S2965-IQC20-A0T.pdf
(542 pages)
- Current page: 233 of 542
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GPTM TimerA (GPTMTAR)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Timer3 base: 0x4003.3000
Offset 0x048
Type RO, reset 0x0000.FFFF (16-bit mode) and 0xFFFF.FFFF (32-bit mode)
June 04, 2007
Reset
Reset
Type
Type
Bit/Field
31:16
15:0
RO
RO
31
15
0
1
Register 17: GPTM TimerA (GPTMTAR), offset 0x048
This register shows the current value of the TimerA counter in all cases except for Input Edge Count
mode. When in this mode, this register contains the time at which the last edge event took place.
RO
RO
30
14
1
1
Name
TARH
TARL
RO
RO
29
13
1
1
RO
RO
28
12
0
1
RO
RO
Type
27
11
1
1
RO
RO
RO
RO
0x0000 (16-bit
26
10
(32-bit mode)
0
1
0xFFFF
0xFFFF
mode)
Reset
RO
RO
25
1
9
1
Preliminary
Description
GPTM TimerA Register High
If the GPTMCFG is in a 32-bit mode, TimerB value is read. If the
GPTMCFG is in a 16-bit mode, this is read as zero.
GPTM TimerA Register Low
A read returns the current value of the GPTM TimerA Count Register,
except in Input Edge Count mode, when it returns the timestamp from
the last edge event.
RO
RO
24
1
8
1
TARH
TARL
RO
RO
23
1
7
1
RO
RO
22
1
6
1
RO
RO
21
0
5
1
RO
RO
20
1
4
1
LM3S2965 Microcontroller
RO
RO
19
1
3
1
RO
RO
18
1
2
1
RO
RO
17
1
1
1
RO
RO
16
0
0
1
233
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