LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 348

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LM3S2965-IQC20-A0T

Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Synchronous Serial Interface (SSI)
SSI Status (SSISR)
SSI0 base: 0x4000.8000
SSI1 base: 0x4000.9000
Offset 0x00C
Type RO, reset 0x0000.0003
348
Reset
Reset
Type
Type
Bit/Field
31:5
4
3
2
1
0
RO
RO
31
15
0
0
Register 4: SSI Status (SSISR), offset 0x00C
SSISR is a status register that contains bits that indicate the FIFO fill status and the SSI busy status.
RO
RO
30
14
0
0
reserved
Name
RNE
BSY
RFF
TNF
TFE
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
RO
R0
reserved
RO
RO
26
10
0
0
Reset
0
0
0
0
1
1
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI Busy Bit
0: SSI is idle.
1: SSI is currently transmitting and/or receiving a frame, or the transmit
FIFO is not empty.
SSI Receive FIFO Full
0: Receive FIFO is not full.
1: Receive FIFO is full.
SSI Receive FIFO Not Empty
0: Receive FIFO is empty.
1: Receive FIFO is not empty.
SSI Transmit FIFO Not Full
0: Transmit FIFO is full.
1: Transmit FIFO is not full.
SSI Transmit FIFO Empty
0: Transmit FIFO is not empty.
1: Transmit FIFO is empty.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
BSY
RO
RO
20
0
4
0
RFF
RO
RO
19
0
3
0
RNE
RO
RO
18
0
2
0
June 04, 2007
TNF
RO
RO
17
0
1
1
TFE
RO
R0
16
0
0
1

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