LM3S2965-IQC20-A0T Luminary Micro, Inc., LM3S2965-IQC20-A0T Datasheet - Page 338
LM3S2965-IQC20-A0T
Manufacturer Part Number
LM3S2965-IQC20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S2965-IQC20-A0T.pdf
(542 pages)
- Current page: 338 of 542
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Synchronous Serial Interface (SSI)
14.2.4.7 MICROWIRE Frame Format
338
Figure 14-9. Freescale SPI Frame Format with SPO=1 and SPH=1
SSIClk
SSIFss
Note:
In this configuration, during idle periods:
■
■
■
■
■
If the SSI is enabled and there is valid data within the transmit FIFO, the start of transmission is
signified by the SSIFss master signal being driven Low. The master SSITx output pad is enabled.
After a further one-half SSIClk period, both master and slave data are enabled onto their respective
transmission lines. At the same time, SSIClk is enabled with a falling edge transition. Data is then
captured on the rising edges and propagated on the falling edges of the SSIClk signal.
After all bits have been transferred, in the case of a single word transmission, the SSIFss line is
returned to its idle high state one SSIClk period after the last bit has been captured.
For continuous back-to-back transmissions, the SSIFss pin remains in its active Low state, until
the final bit of the last word has been captured, and then returns to its idle state as described above.
For continuous back-to-back transfers, the SSIFss pin is held Low between successive data words
and termination is the same as that of the single word transfer.
Figure 14-10 on page 338 shows the MICROWIRE frame format, again for a single frame. Figure
14-11 on page 339 shows the same format when back-to-back frames are transmitted.
Figure 14-10. MICROWIRE Frame Format (Single Frame)
SSIClk
SSIFss
SSIRx
SSIRx
SSITx
SSITx
SSIClk is forced High
SSIFss is forced High
The transmit data line SSITx is arbitrarily forced Low
When the SSI is configured as a master, it enables the SSIClk pad
When the SSI is configured as a slave, it disables the SSIClk pad
Q is undefined.
Q
MSB
MSB
MSB
8-bit control
LSB
Preliminary
0
4 to 16 bits
MSB
output data
4 to 16 bits
LSB
LSB
LSB
Q
June 04, 2007
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