MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 155
MT9072
Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT9072.pdf
(278 pages)
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Advance Information
15-8
15-1
7-0
Bit
Bit
Bit
15-3
5
4
3
2
1
0
2-0
0
Bit
F5RVS
F5SVS
F4HVS
F4EVS
F4RVS
F4SVS
Name
Name
STAD
Name
(7-0)
STIS
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
#
#
ID15-3
Name
ID2-0
(000)
Table 131 - Identification Revision Code Data Register (Address 912) (T1)
not used.
ST-BUS Analyser Data. This is the data for the ST-BUS analyser buffer. 920 is the first byte of the
data that is being "analyzed". The source of the data can be any ST-Bus stream from any Framer.
not used.
ST-BUS Analyser Interrupt Status. This bit (if unmasked) is set if the ST-BUS Analyser is filled
up. This bit can be masked and by the FSTM bit in address 905.
Framer 5 Rx Line Vector Status. This bit if unmasked is set if any of the bits in the Interrupt
Receive Line status register(535) are Framer 5 are set. This bit can be masked and will remain
low by theF1RM bit in address 903.
Framer 5 Sync Vector Status. This bit if unmasked is set if any of the bits in the Interrupt Sync
status register(534) for Framer 5 are set. This bit can be masked and will remain low by the
F1SM bit in address 903.
Framer 4 HDLC Vector Status. This bit if unmasked is set if any of the bits in the HDLC status
register(433)status for Framer 4 are set. This bit can be masked and will remain low by the F7HM
bit in address 903.
Framer 4 Elastic Vector Status. This bit if unmasked is set if any of the bits in the Interrupt
Receive Elasitc store register(436) or Elastic store status for Framer 4 are set. This bit can be
masked and will remain low by the F4EM bit in address 903.
Framer 4 Rx Line Vector Status. This bit if unmasked is set if any of the bits in the Interrupt
Receive Line status register(435) for Framer 4 are set. This bit can be masked and will remain low
by the F4RM bit in address 903.
Framer 4 Sync Vector Status. This bit if unmasked is set if any of the bits in the Interrupt Sync
status register(434) Framer 4 are set. This bit can be masked and will remain low by the F4SM bit
in address 903.
Table 132 - ST-BUS Analyzer Vector Status Register (Address 913) (T1)
Table 130 - Interrupt Vector 2 Status Register (Address 911) (T1)
ID Number. Contains 0100000001011.
These 3 bits make up a binary code which identify the revision of this device.
Table 133 - ST-BUS Analyser Data(Address 920-93F) (T1)
Functional Description
Functional Description
Functional Description
Functional Description
MT9072
155
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