MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 61

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

Advance Information
A Bit oriented match register is available RXBOMM(Y08) and a maskable interrupt can be generated when the
received Bit Oriented Message matches the contents of RXBOMM; the mask can be enabled by writing a ‘0’ to
bit 3 of the Receive Line and Timer Interrupt Mask Register (Y45).
Note:
Octet #
10
12
13
14
11
1
2
3
4
5
6
7
8
9
Table 21 - T1.403 and T1.408 Message Oriented Performance Report Structure (T1)
ADDRESS
CONTROL
ONE SECOND REPORT
FCS
00111000
00000011
VARIABLE
G1 = 1
00111010
00000001
G2 =1
G3 =1
G4 =1
G5 =1
G6 =1
SE = 1
FE = 1
LV = 1
SL = 1
LB = 1
U1,U2 = 0
R = 0
NmNI = 00, 01, 10, 11
G3
G3
G3
G3
FE
FE
FE
FE
C
F
S
T
F
8
INTERPRETATION
SE
SE
SE
SE
SAPI = 14, C/R = 0 (CI) EA = 0
LV
LV
LV
LV
O
INTERPRETATION
A
E
C
7
L
Unacknowledged Information Transfer
INTERPRETATION
SAPI = 14, C/R = 1(Carrier) EA = 0
TEI = 0, EA =1
CRC16 Frame Check Sequence
G4
G4
G4
G4
LB
LB
LB
LB
N
A
P
S
INTERPRETATION
6
I
CRC Error Event =1
10 < CRC Error Event < 100
CRC Error Event > 320
100 < CRC Error Event < 319
Severely - Errored Framing Event >=1
Frame Synchronization Bit Error Event >=1
Line code Violation Event >=1
Slip Event >=1
Payload Loopback Activated
Reserved - set to 0
1 < CRC Error Event < 5
Under Study for sync.
One Second Module 4 counter
5 < CRC Error Event < 10
U1
G1
U1
G1
U1
G1
U1
G1
G
T
5
I
U2
U2
U2
U2
R
R
R
R
R
4
C / R
G5
G2
G5
G2
G5
G2
G5
G2
O
3
Nm
Nm
Nm
Nm
SL
SL
SL
SL
2
L
EA
EA
G6
G6
G6
G6
NI
NI
NI
NI
1
01111110
00111000
or
00111010
00000001
00000011
t0
t0
t0-1
t0-1
t0-2
t0-2
t0-3
t0-3
Frame Check
Sequence
Octet Content
MT9072
61